2023 Theme: Space and missile defense community
MARK YOUR CALENDAR and join The SMD Symposium is the leading educational, professional development and networking event in the space and missile defense community.
Join us on August 8-10, 2023 in Huntsville, USA, at the SMD Symposium 2023
BOOTH N°1408, South Hall
2023 Theme: Advancing EMS Superiority Through Strategic Alliances and Partnerships
MARK YOUR CALENDAR and join us for three full days of informative and engaging keynote sessions, breakout discussions, and tech talks at AOC’s Annual International Symposium & Convention.
This leading event for electronic warfare, electromagnetic spectrum operations, cyber-electromagnetic activities, and information operations professionals worldwide is taking place this December
Join us on December 11-13 , 2023 In National Harbor, MD
BOOTH N°1107
The AV145 is part of apissys’ range of High-Speed data conversion and signal processing solutions based on the VITA 46, VPX standard.
The AV145 is fully compliant with OpenVPX standard, accommodating various communication
protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted
standard such as Aurora.
The AV145 includes one Xilinx® ZYNQ® Ultrascale+™ RFSoC GEN 3 XCZU47DR with the minimum
external resources for low power applications.
The AV145 features eight channels 14-bit 5 Gsps ADC and eight channels 14-bit 9.85 Gsps DAC with
optimized analog performances, making it ideally suited for embedded signal processing applications
such as Electronic Warfare, Wideband Radar Transmitter/Receivers or Wideband Communication
applications.
The AV145 features one internal ultra-low jitter reference and two clock synthesizers and can be used
with external reference for higher flexibility.
The AV145 Xilinx® ZYNQ® Ultrascale+™ RFSoC XCZU47DR provides an impressive processing
capability of more than 5.5 TMACs (Multiply Accumulate per second), four 1333 MHz Arm Cortex-A53
cores, one 512M64 or 1G64 DDR4-2400 SDRAM memory for data processing, two 2 Gb synchronous
FLASH memory for program boot and one 1TB NVMe embedded SSD.
The AV145 provides one GbE, one UART and one USB 2.0 interfaces.
The AV145 comes with an embedded Linux and all necessary cores to build user FPGA applications.
The AC104 is a 3U VPX 19” rackable chassis designed for development and deployment.
The AC104 is able to support up to 12-slot backplane with a 1″ slot pitch.
The AC104 backplane supports Rear Transition Modules (RTM) with access to all user defined VPX signals.
The chassis features a 1,200 W power supply and strong fans for adequate cooling capabilities.
Support for Conduction Cooled modules can be provided on demand.
Achieving Multi-Domain Integration
Association of Old Crows (AOC) is an organisation for individuals who have common interests in Electronic Warfare (EW), Electromagnetic Spectrum Management Operations, Cyber Electromagnetic Activities (CEMA), Information Operations (IO), and other information-related capabilities.
With a history spanning more than 25 years, AOC Europe is the association’s flagship international event.
Across three days, the show connects organisations and individuals from government, defence, industry, and academia to promote the exchange of ideas and information and review the latest advances in these fields.
Join us on May 15-17, 2023 In Bonn, Germany
BOOTH B22
The AV143 is part of apissys’ range of High-Speed data conversion and signal processing solutions based on the VITA 46, VPX standard.
The AV143 is fully compliant with OpenVPX standard, accommodating various communication protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted standard such as Aurora.
The AV143 combines one dual channel 12-bit 3.2 Gsps / single channel 12-bit 6.4 Gsps ADC and one dual channel 12-bit 3.2 Gsps / single channel 12-bit 6.4 Gsps DAC with ultra-high processing power delivered by Xilinx® Virtex® Ultrascale+™ FPGA, making it ideally suited for embedded signal processing applications such as Electronic Warfare, Wideband Radar Transmitter/Receivers or Wideband Communication applications.
The AV143 features an internal ultra-low jitter reference and one clock synthesizer and can be used with either external clock or external reference for higher flexibility.
The AV143 includes one Xilinx® Virtex® Ultrascale+™ VU13P FPGA for an impressive processing capability of more than 19 TMACs (Multiply Accumulate per second), two 1G64 DDR4-2666 SDRAM memory for data processing and 2 Gb synchronous FLASH memory for multiple firmware storage. The AV143 can also be fitted with one Xilinx® Virtex® Ultrascale+™ VU7P or VU9P FPGA.
The AV143 provides a USB 2.0 interface and a USB to UART interfaces intended to be used for system monitoring and supervision.
The AV143 comes with complete software drivers for Windows and Linux. An FPGA Development Kit is provided including all necessary cores to build user FPGA application.
The AV129 is part of apissys’ range of High Speed data conversion and signal processing solutions based on the VITA 46, VPX standard.
The AV129 is fully compliant with OpenVPX standard, accommodating various communication protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted standard such as Aurora.
The AV129 combines four 14-bit 3 Gsps ADCs and four 16-bit 6/12 Gsps DAC with ultra-high processing power delivered by Xilinx® Kintex® Ultrascale™ FPGA, making it ideally suited for fully synchronous multiple channels test and measurement, MIMO, Electronic Warfare or Ultra-Wideband Radar Transceiver applications.
The AV129 features an internal ultra-low jitter reference and one clock synthesizer and can be used with either external clock or external reference for higher flexibility.
The AV129 includes one Xilinx® Kintex® Ultrascale™ KU115 FPGA for an impressive processing capability of more than 7 TMACs (Multiply Accumulate per second), two high speed 256M64 DDR3 SDRAM memory for data processing and two 1 Gb synchronous FLASH memory for multiple firmware storage.
The AV129 provides a USB 2.0 interface and a 10/100 Ethernet interface intended to be used for system monitoring and supervision.
The AV129 comes with complete software drivers for Windows and Linux. An FPGA Development Kit is provided including all necessary cores to build user FPGA application.
The AV127 is part of apissys’ range of High Speed data conversion and signal processing solutions based on the VITA 46, VPX standard.
The AV127 is fully compliant with OpenVPX standard, accommodating various communication protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted standard such as Aurora.
The AV127 combines up to 36 full duplex fiber interfaces with ultra-high processing power delivered by Xilinx® Kintex® Ultrascale™ FPGA, making it ideally suited for embedded signal processing applications such as Wideband Communication, Phased Array Radar or Electronic Warfare applications.
The AV127 features three fully independent low jitter clock synthesizers for support of most communication protocols on fiber.
The AV127 includes one Xilinx® Kintex® Ultrascale™ KU115 FPGA for an impressive processing capability of more than 7 TMACs (Multiply Accumulate per second), two high speed 256M64 DDR3 SDRAM memory for data processing and two 1 Gb synchronous FLASH memory for multiple firmware storage.
The AV127 provides a USB 2.0 interface and a 10/100 Ethernet interface intended to be used for system monitoring and supervision.
The AV127 comes with complete software drivers for Windows and Linux. An FPGA Development Kit is provided including all necessary cores to build user FPGA application.
The AC103 is a 3U VPX desktop chassis with a 3 slot, 1″ slot pitch, OpenVPX BKP3-CEN03-15.2.9-3 backplane designed for development, test and commercial application deployment.
The AC103 backplane supports Rear Transition Modules (RTM) with access to all VPX P2 signals.
The chassis features a 600 W power supply and strong fans for adequate cooling capabilities
For the past 20 years, reflex ces, a European advanced technology expert, has worked with market leaders to design and manufacture high-end FPGA-based electronic boards and systems.
ApisSys analog RF skills will be combined to reflex ces FPGA architectures, inside the CES Technology group.
